ミア リアーズ ウル ハック
MIAN RIAZ UL HAQUE
助教
学部等 |
総合理工学部
知能情報デザイン学科
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researchmap 個人URL |
https://researchmap.jp/mian_riaz |
SDGs | |
ホームページURL |
産業分野
researchmap
研究分野
- 情報通信 / 計算機システム / Multi site VLSI test
研究キーワード
Wafer-level Variation Modeling, Multi-site RF IC Testing, Hierarchical Gaussian Process
研究概要
In this research, we addressed a wafer-level performance prediction method for multi-site testing that can consider the site-to-site variation. The proposed method is based on the Gaussian process, which is widely used for wafer-level spatial correlation modeling, improving the prediction ac- curacy by extending hierarchical modeling to exploit the test site information provided by test engineers.